List of Experiments

Experiment No 1 : FAMILIARIZATION OF DIGITAL IC’S & IC TRAINER KIT

Experiment No 2 : VERIFICATION & REALISATION OF DE MORGAN’S THEOREM

Experiment No 3 : REALISATION OF SOP & POS FUNCTIONS AFTER K-MAP REDUCTION.

Experiment No 4 : HALF ADDER & FULL ADDER USING GATES.

Experiment No 5 : 4-bit adder/subtractor & BCD adder using IC 7483

Experiment No 6 : Realisation of 2-bit comparator using gates and study of four-bit comparator IC 7485.

Experiment No 7 : Study of multiplexer IC and realization of combinational circuits using multiplexer IC

Experiment No 8 : Realization of SR, T, D & JK flip flops using gates.

Experiment no 9. Study of flip flop ICs (7474 & 7476).

Experiment No 10 - Study of counter ICs (7490, 7493)

Experiment No 11 - Design of synchronous up, down & modulo-N counters

Experiment No 12 - Study of shift register IC 7495, Ring counter and Johnson’s counter.